Máy phân tích logic TLA6400 Series

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Tektronix

Model: TLA6400 Series

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Specifications

All specifications are guaranteed unless noted otherwise. All specifications apply to all models unless noted otherwise.

TLA6400 selection guide
Characteristic TLA6401 TLA6402 TLA6403 TLA6404
Channels 34 68 102 136
High-speed timing 25 GHz (40 ps) with 128 Kb record length
Maximum timing sample rate (Half/Full channel) 3.2 GHz / 1.6 GHz
Maximum State clock rate 333 MHz (standard)
667 MHz (with Option 1T)
Maximum State data rate 667 Mb/s (standard)
1333 Mb/s (with Option 1T)
Maximum record length 2 Mb (standard)
4 Mb (Option 1S)
8 Mb (Option 2S)
16 Mb (Option 3S)
32 Mb (Option 4S)
64 Mb (Option 5S)
Analog Mux 4 fixed channels (standard)
Any signal (user selectable) may be routed to 4 output BNCs with Option AM
Probing options (order separately) P5910 – 17-channel General-purpose probe
P5934 – 34-channel Mictor probe
P5960 – 34-channel D-MAX probe
General characteristics
Number of channels (all channels are acquired including clocks)
TLA6401
34 channels (2 are clock channels). Clock channels can also be used as qualifiers.
TLA6402
68 channels (4 are clock channels). Clock channels can also be used as qualifiers.
TLA6403
102 channels (4 are clock and 2 are qualifier channels). Clock channels can also be used as qualifiers.
TLA6404
136 channels (4 are clock and 4 are qualifier channels). Clock channels can also be used as qualifiers.
Channel grouping
No limit to number of groups or number of channels per group (all channels can be reused in multiple groups).
Time stamp
54 bits at 20 ps resolution (>4 days duration)
Clocking/acquisition modes
Asynchronous/Synchronous; 25 GHz MagniVu high-speed timing is available simultaneous with all modes.
PC characteristics
Operating system
Microsoft® Windows® 7 Ultimate, 64-bit
Processor
Intel® Core i3-2120, 3.3 GHz, 3M Cache
Chipset
Intel® Q67 chipset
Memory
2 × 2 GB DIMM, 4 GB TotalDDR3, 1066 MHZ, PC3-8500
Sound
Line In, Line Out, and Mic In connectors
3.5 in., ≥500 GB Serial ATA, 7200 RPM
Optical drive
Internal 4.7 GB DVD±R/RW
External display port type
One (1) DVI connector and one (1) VGA connector
External display resolution
Up to 1920 × 1200 noninterlaced at 32-bit color, each for both primary and secondary displays
Network port
Two (2) 10/100/1000 LAN with RJ-45 connector
USB port
Five (5) USB 2.0 ports and two (2) USB 3.0 ports. USB ports can be disabled in BIOS.
Integral controls
Front panel display
Size: 15 in. (38.1 cm) diagonalType: Active-matrix color TFT LCD with backlight

Resolution: 1024 × 768

Simultaneous display capability
Both the front-panel and one external display can be used simultaneously at 1024 × 768 resolution
Front panel
General-purpose knob with dedicated hotkeys and knobs for horizontal and vertical scaling and scrolling
Touch screen
Available with Option 18. Can be enabled/disabled with a front-panel button.
Integrated View (iView™) capability
TLA mainframe configuration requirements
GPIB-iView™ (Opt. 1C)USB-iView™ (Opt. 2C)
Number of Tektronix oscilloscopes that can be connected to a TLA system
1
External oscilloscopes supported
More than 100. For a complete listing of current supported oscilloscopes, please visit our website http://www.tek.com/iview.
TLA connections
USB, Trigger In, Trigger Out, Clock Out
Oscilloscope connections
GPIB-iView™ (Opt. 1C)
GPIB, Trigger In, Trigger Out, Clock In (when available)
USB-iView™ (Opt. 2C)
USB Device Port, Trigger In, Trigger Out
Setup
iView™ external oscilloscope wizard automates setup.
Data correlation
After oscilloscope acquisition is complete, the data is automatically transferred to the TLA and time correlated with the TLA acquisition data.
Deskew
The oscilloscope and TLA data is automatically deskewed and time correlated when using the iView™ external oscilloscope cable.
GPIB-iView™ (Opt. 1C) External oscilloscope cable length
2 m (6.6 ft.)
USB-iView™ (Opt. 2C) External oscilloscope cable length
2 m (6 ft.)
Symbolic support
Number of symbols/ranges
Unlimited (limited only by amount of virtual memory available on TLA)
Object file formats supported
IEEE695, OMF 51, OMF 86, OMF 166, OMF 286, OMF 386, COFF, Elf/Dwarf 1 and 2, Elf/Stabs, TSF (If your software development tools do not generate output in one of the above formats, TSF, or the Tektronix symbol file, a generic ASCII file format is supported. The generic ASCII file format is documented in the TLA online help). If a format is not listed, please contact your local Tektronix representative.
External instrumentation interface
System Trigger output
Asserted whenever a system trigger occurs (TTL-compatible output, back-terminated into 50 Ω)
System Trigger input
Forces a system trigger when asserted (adjustable threshold between 0.5 V and 1.5 V, edge sensitive, falling-edge latched)
External Signal output
Can be used to drive external circuitry from a module’s trigger mechanism (TTL-compatible output, back-terminated into 50 Ω)
External Signal input
Can be used to provide an external signal to arm or trigger any or all modules (adjustable threshold between 0.5 V and 1.5 V, level sensitive)
Power
Voltage range/frequency
90-264 VAC at 47-63 Hz
Power consumption
400 W maximum
Environmental
Temperature
Operating
+5 °C to +40 °C
Nonoperating
-20 °C to +60 °C
Humidity
Max wet bulb temperature: +29 °C

Operating
20% to 80% relative humidity noncondensing
Nonoperating
8% to 80% relative humidity noncondensing
Altitude
Operating
To 3,000 meters (10,000 ft.), derate maximum operating temperature by 1 °C per 300 meters above 1,500 meters altitude
Nonoperating
To 12,000 meters (40,000 ft.)
Safety
UL61010-1:2004, CAN/CSA-C22.2 No. 61010-1:2004, EN61010-1:2001, and IEC61010-1:2001
Physical characteristics
Dimensions
Height
297 mm (11.7 in.)
Width
437 mm (17.2 in.)
Depth
387 mm (15.2 in.)
Net weight
TLA6401
13.5 kg (29 lb. 13 oz.)
TLA6402
13.9 kg (30 lb. 10 oz.)
TLA6403
14.3 kg (31 lb. 8 oz.)
TLA6404
14.7 kg ( 32 lb. 5 oz.)
Shipping weight
TLA6401
20.5 kg (45 lb. 2 oz.)
TLA6402
20.9 kg (46 lb. 1 oz.)
TLA6403
21.3 kg ( 47 lb.)
TLA6404
21.7 kg (47 lb. 8 oz.)
Input characteristics
Threshold selection range
From -2.0 V to +4.5 V in 5 mV incrementsThreshold presets include TTL (1.5 V), CMOS (1.65 V), ECL (-1.3 V), PECL (3.7 V), LVPECL (2.0 V), LVCMOS 1.5 V (0.75 V), LVCMOS 1.8 V (0.9 V), LVCMOS 2.5 V (1.25 V), LVCMOS 3.3 V (1.65 V), LVDS (0 V), and user defined.
Threshold selection channel granularity
Separate selection for each channel
Threshold accuracy
23 °C ±5 °C
±(50 mV + 1% of threshold voltage setting) of threshold voltage setting
Full range
±(80 mV + 2%)
Input voltage range
Operating
-2.5 V to 5.0 V
Nondestructive
-4.5 V to +13 V
Minimum input voltage swing
300 mV (P5910 and P5960)
State acquisition system
Maximum State clock rate
333 MHz (standard)667 MHz (optional)
Maximum data rate
667 Mb/s (standard)1333 Mb/s (optional)
State record length with time stamps
2 Mb, 4 Mb, 8 Mb, 16 Mb, 32 Mb, 64 Mb
Setup and hold selection range
From 15 ns before, to 7.5 ns after clock edge in 20 ps increments
Setup and hold window
Single channel
260 ps typical (P5910 and P5960)
Minimum clock pulse width
250 ps (P5910 and P5960)
Timing acquisition system
MagniVu™ timing
40 ps, adjustments to 80 ps, 160 ps, 320 ps, and 640 ps
MagniVu timing record length
128 Kb per channel, with adjustable trigger position
Deep timing resolution (half/full channel)
312.5 ps / 625 ps to 50 ms
Deep timing resolution with glitch storage enabled
1.25 ns to 50 ms
Deep timing record length (half/full channels with time stamps and with or without transitional storage)
4/2 Mb, 8/4 Mb, 16/8 Mb, 32/16 Mb, 64/32 Mb, 128/64 Mb per channel
Deep timing record length with glitch storage enabled
Half of default main memory depth
Channel-to-channel skew
160 ps typical (P5910 and P5960)
Minimum recognizable pulse/glitch width (single channel)
250 ps (P5910 and P5960)
Minimum detectable setup/hold violation
80 ps
Minimum recognizable multichannel Trigger event
Sample period + channel-to-channel skew
Analog acquisition system
Bandwidth
2 GHz typical (P5910 and P5960)
Attenuation
10X or 5X
Offset and Gain (accuracy)
±80 mV, ±2% of signal amplitude
Run/Stop requirements
None, analog outputs are always active
iCapture™ Analog outputs
Compatible with any supported Tektronix oscilloscope
iCapture Analog output BNC cable
4; Low loss, 10X, 36 in. Basic Analog Multiplexer functionality is offered standard on all TLA6400 models. This routes 4 fixed channels to the iCapture Analog Output BNCs. The outputs cannot be switched to other logic analyzer channels. Option AM enables full analog multiplexer control and allows the routing of any 4 logic analyzer channels to the iCapture Analog Output BNCs.
Trigger system
Independent Trigger states
16
Maximum idependent If/Then clauses per state
16
Maximum numger of events per If/Then clause
8
Maximum number of actions per If/Then clause
8
Maximum number of Trigger events
26 (2 counters/timers plus any 24 other resources)
Number of word recognizers
24
Number of transition recognizers
24
Number of range recognizers
8
Number of counters/timers
Trigger event types
Word, Group, Channel, Transition, Range, Anything, Counter Value, Timer Value, Signal, Glitch, Setup-and-Hold Violation, Snapshot
Trigger action types
Trigger Module, Trigger All Modules, Trigger Main, Trigger MagniVu, Store, Don’t Store, Store Sample, Increment Counter, Decrement Counter, Reset Counter, Start Timer, Stop Timer, Reset Timer, Snapshot Current Sample, Goto State, Set/Clear Signal, Do Nothing
Maximum triggerable data rate
1333 Mb/s
Trigger machine sequence rate
DC to 800 MHz (1.25 ns)
Counter/timer range
48 bits each (~4 days at 1.25 ns)
Counter rate
DC to 800 MHz (1.25 ns)
Timer clock rate
800 MHz (1.25 ns)
Counter/timer test latency
0 ns
Range recognizers
Double bounded (136 channel max). Can be as wide as any group, must be grouped according to specified order of significance.
Setup-and-hold violation recognizer setup time range
From 7.5 ns before, to 7.5 ns after clock edge in 20 ps increments. This range may be shifted toward the positive region by 0 ns, 2.5 ns, 5 ns, or 7.5 ns.
Setup-and-hold violation recognizer hold time range
From 7.5 ns before, to 7.5 ns after clock edge in 20 ps increments. This range may be shifted toward the positive region by 0 ns, 2.5 ns, 5 ns, or 7.5 ns.
Trigger position
Any data sample
MagniVu trigger postion
MagniVu position can be set from 0% to 60% centered around the MagniVu trigger
Storage control (data qualification)
Global (conditional), by state (start/stop), block, by trigger action, or transitional. Also force main prefill selection available.
P5900 series probes
General
Characteristic P5910 P5934 P5960
Probe type Single-ended data Single-ended clock
(General Purpose)
Single-ended data Single-ended clock
(Mictor 34-channel)
Single-ended data Single-ended clock
(D-Max® Probing technology)
Number of channels 17 34 34
Recommended usage Most general-purpose applications Applications requiring many channels to be connected quickly in a small footprint High-performance applications requiring many channels to be connected quickly in a small footprint
Attachment to target system Fits both 0.100 in. and 2 mm square pin configuration Amp Mictor 34-channel connector D-Max probing technology
Probe load AC/DC 1.3 pF/20 kΩ to 0 V 2 pF/20 kΩ to 0 V 0.8 pF/20 kΩ to 0 V
Input range -2.5 V to +5 V
Maximum voltage (nondestruct) -4.5 V to +13 V
Cable length 1.5 m (5 ft.) 1.2 m (4 ft.) 1.5 m (5 ft.)